ISA Type Package

RTL source on GitHub

SystemVerilog source documented on this page: hw/rtl/NPU_Controller/NPU_Control_Unit/ISA_PACKAGE/isa_pkg.sv

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isa_pkg.sv is the single source of truth for all instruction types, opcode enums, and micro-op structs. Every RTL module does import isa_pkg::*; — no header includes are needed downstream.

The package is organized in compilation order:

  1. Basic address and control typedefs

  2. Device-direction enums (from_device_e, to_device_e, async_e)

  3. GEMV/GEMM flags struct

  4. Opcode enum (opcode_e)

  5. Per-instruction encoding structs (60-bit bodies)

  6. CVO function codes and flags

  7. Memory routing enums (data_route_e)

  8. Micro-op structs decoded from each instruction

Last verified against

Commit 773bd82 @ hwkim-dev/pccx-FPGA-NPU-LLM-kv260 (2026-04-21).

See also

Instruction Encoding — human-readable description of the same encoding. Per-Instruction Encoding — per-instruction field tables.